F-Of-C - open-source Free-Of-Charge vesc6 board in development. Schematics available

I think 3 usd difference is not much, if it improves the routing and signal quality, especially considering the price of mosfets, etc… How much is the current bom cost?

Edit: If the power button is possible, this would be ideal for onewheel conversions. I think I could even build a batch of them and assemble boxes for people, since there would be no supply chain issues. Sweet!

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What are the main differences when comparing Cheap FOCer?

So I ordered the updated board at JLCPCB with “basic” components assembled by JLCPCB. The “extended” parts I will solder myself.

So without jst-connectors the price of components on 1 board is $22.35
(If ordering in larger batches, there will be discounts. Here the batch size is only 2)

The price includes both “basic” and “extended” components, and mosfets.

It better work…

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In sync: GitHub - nordstream3/FOC

Cheaper, simpler and better, in terms of voltage, amps and HFI.

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Can I make a suggestion/request…

One thing that’s super helpful is to keep the very first post updated with the basic specs (e.g. how much voltage and current this can handle), expected cost of BOM, and link to the latest documentation.

Great stuff. Thanks!

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It looks like I spoke too soon. I see that you have a link to the docs, and the docs have a nice readme.md file. The only (tiny) nit, is that you link to docs that link to a new set of docs. You might update the top post to link directly to the current docs - but now I’m just looking for things to whine about. :slight_smile:

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I’m WAY behind on this, so my apologies if some of this has been addressed.
I love the fact that JLCPCB will populate their components, but that doesn’t address the issue of replacing a fine pitch component. Personally I’d love to see it use something with a somewhat larger pitch. But it’s certainly not a deal breaker.

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To my knowledge there isn’t a coarser pitch version of the STM32F405. The other thing to consider is that a coarser pitch will make the part larger and also typically more expensive.

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I would LOVE to edit the first post, if I only knew how to do that. I haven’t been clever enough to figure out how to edit ANY posts in this forum, so maybe you can tell me?

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Look for this pencil

If you don’t have it then you need to fulfill these requirements to up your trust level

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OK, I’m not there yet it seems. Can I be invited to trust level 1 by a trusted user? I need to start reading and posting other topics.

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No, only by the Admins if there’s a valid reason like you being stuck at 0 or if you had a higher trust level on the old ESB Forum.

It looks like you’re right. I saw that the data sheet showed several packages and I assumed others had larger pitch, but it doesn’t appear to be the case.

I’ve soldered IC’s of that pitch, but I’m still a little sketchy at it.

I’m going to ask a couple of questions to make myself look really dumb…

  • It seems like you have a prototype of the board up and you’re basically bringing it up on the bench. Looking at signals, configuring it with VESC_tool, etc. But no one is torture testing these things in the real world just yet. Do I have that right?
  • I downloaded all the design files, and I see some source code (hwconf). It looks to me like that would be compiled into the firmware to use with the particular hardware design. Is that right? Do you plan to release a firmware hex version we can simply download, or do we have to setup a linux machine to build the firmware.

Thanks.

You are totally right about your first assessment. No one is torture testing anything.

  • Purpose of version 0.1 was to test basic functionality like FOC, DC-DC conversion (12V, 5V 3.3V) stability and noise, gate-drivers. A simple component test without torture. It very soon became apparent that the current sensing circuit of Phase 3 needed re-routing. Also there was The Usual Suspects issue where parasitic_capacitance + high dv/dt → mosfet self-turn-on → shoot-trough → mosfet blow-up. In version 0.2 (on-the-way from jlcpcb), I’ve added a PNP Current Bypass circuit, to address this issue.

  • There is a hwconf folder, which includes the vesc setup configuration that needs to be compiled with the vesc firmware. This configuration is not final yet, but once it is, I will make a pull request on the vesc firmware, hoping that the foc/king configuration will be accepted as a “standard” board supported by general vesc firmware updates. A temporary solution could be a compiled hex for download.

Fortunately, there are a lot of very helpful people for review and discussions on discord. The time where I will need a handful of testers will probably be Version 0.3, or even 0.4. Just to bring down expectations a little bit. It’s a potential deep rabbit hole (like someone told me) and I can assure you that I put a lot of time into this. I have decided to make this Open Source from the beginning, to make sure that I don’t get corrupted by any potential prospect of profit.

PNP bypass circuit for keeping gate voltage low during turn-off:
image

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What fets did you end up using? I checked the fets from bom but they were about 5 usd per piece. If I found the correct one: https://cz.mouser.com/ProductDetail/Texas-Instruments/CSD19536KCS?qs=%252BFzhjShcsaKeclRusN0gdQ%3D%3D

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That’s right. I haven’t completely settled on the fets. But you can get the CSD19536KCS on Aliexpress of around 1$/piece:

Ali, CSD19536KCS 6 pcs (shipping incl.) US $5.89

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Another cheap alternative with specs within the requirements, available cheap at LCSC is
CRST030N10N
I will also test this alternative.

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I don’t have any first hand knowledge, but I’ve read that buying IC’s from places like AliExpress can be dicey. Apparently some are cheap knock-offs, some are used, some are actually similar or “equivalents” that have been re-marked to look like the real thing. And some, I assume, are very fine IC’s.

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